Digital Logic
For the logic input levels shown in Figure 3E12, what are the logic levels of test points A, B and C in this circuit? (Assume positive logic.)
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A is high, B is low and C is low.
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Correct AnswerA is low, B is high and C is high.
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A is high, B is high and C is low.
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A is low, B is high and C is low.
For the logic input levels shown in Figure 3E12, what are the logic levels of test points A, B and C in this circuit?
(Assume positive logic.)
A is low, B is high and C is high.
Please notice that the path from either H(igh) is not clear, thus A is low. On the other hand, the opposite is for B, and C is high.
From sammylandler:
The answer to this truth table is found by finding the output of each symbol. Each output will go into the next input. In this problem, each of these truth table symbols are NAND gates.
See Wikipedia's article Truth table a NAND gate is defined as follows:
"The logical NAND is an operation on two logical values, typically the values of two propositions, that produces a value of false if both of its operands are true. In other words, it produces a value of true if at least one of its operands is false."
The L and H values indicate LOW and HIGH logic states.
See Wikipedia's article on Logic gate.
For more information, please see the TechTarget site for the article logic gate (AND, OR, XOR, NOT, NAND, NOR and XNOR)
Also, see the Tutorials Point site for the article Logic Gates
Last edited by markadlerdallas. Register to edit
For the logic input levels given in Figure 3E13, what are the logic levels of test points A, B and C in this circuit? (Assume positive logic.)
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A is low, B is low and C is high.
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A is low, B is high and C is low.
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Correct AnswerA is high, B is high and C is high.
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A is high, B is low and C is low.
For the logic input levels given in Figure 3E13, what are the logic levels of test points A, B and C in this circuit? (Assume positive logic.)
A is high, B is high and C is high.
From sammylandler:
The answer to this truth table is found by finding the output of each symbol. Each output will go into the next input. In this problem, each of these truth table symbols are NAND gates.
See Wikipedia's article Truth table a NAND gate is defined as follows:
"The logical NAND is an operation on two logical values, typically the values of two propositions, that produces a value of false if both of its operands are true. In other words, it produces a value of true if at least one of its operands is false."
The L and H values indicate LOW and HIGH logic states.
See Wikipedia's article on Logic gate.
For more information, please see the TechTarget site for the article logic gate (AND, OR, XOR, NOT, NAND, NOR and XNOR)
Also, see the Tutorials Point site for the article Logic Gates
Last edited by markadlerdallas. Register to edit
Given the input levels shown in Figure 3E14 and assuming positive logic devices, what would the output be?
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Correct AnswerA is low, B is high and C is high.
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A is high, B is high and C is low.
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A is low, B is low and C is high.
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None of the above are correct.
Given the input levels shown in Figure 3E14 and assuming positive logic devices, what would the output be?
A is low, B is high and C is high.
From sammylandler:
The answer to this truth table is found by finding the output of each symbol. Each output will go into the next input. In this problem, each of these truth table symbols are NAND gates.
See Wikipedia's article Truth table a NAND gate is defined as follows:
"The logical NAND is an operation on two logical values, typically the values of two propositions, that produces a value of false if both of its operands are true. In other words, it produces a value of true if at least one of its operands is false."
The L and H values indicate LOW and HIGH logic states.
See Wikipedia's article on Logic gate.
For more information, please see the TechTarget site for the article logic gate (AND, OR, XOR, NOT, NAND, NOR and XNOR)
Also, see the Tutorials Point site for the article Logic Gates
Last edited by markadlerdallas. Register to edit